The present invention is directed to the manufacture of masks used in the lithographic production of integrated circuits and, in particular, to the manufacture of alternating phase shifting masks (altPSMs).
As an alternative to chrome on glass (COG) masks used in the lithographic production of integrated circuits and other components, alternating phase shifting masks (altPSMs) have been employed in order to increase the resolution of the critical (active area) patterns projected. Such increased resolution enables smaller line widths to be exposed on the resist and consequently etched into or deposited on the wafer substrate. This is done by manipulating the electric field vector or phase of the energy beam, e.g., visible or ultraviolet light, used in the lithographic process. This phase variation is achieved in PSMs by modifying the length that a light beam travels through the mask material. By recessing the mask to an appropriate depth, light traversing the thinner portion of the mask and light traversing the thicker portion of the masks will be 180° out of phase, that is, their electric field vector will be of equal magnitude, but point in exactly the opposite direction, so that any interaction between these light beams results in perfect cancellation.
The process of defining portions of the mask as 0° phase regions and other portions as 180° phase regions is generally referred to as phase coloring. Any other pairs of phase regions of shapes may be used in phase coloring, provided that they are opposite phases, i.e., they are 180° out of phase. Assigning a color is therefore analogous to determining any binary quality, and two opposite phases or colors may also be referred to as one (1) or zero (0), or positive (+) or negative (−). Techniques for automatic phase coloring are described in Kim et al. U.S. Pat. No. 5,883,813 and Liebmann et al. U.S. Pat. No. 6,609,245, the disclosures of which are hereby incorporated by reference.
AltPSM shapes are widely used in masks for logic circuit designs. Currently, most logic designs consist of a large fraction of synthesized functional blocks known as random logic macros (RLMs). Some chips, such as ASICs, may be entirely synthesized from a standard cell library of circuit designs. The designs or books in a standard cell library may be used hundreds or thousands of times each in a chip design. In each placement, the individual cell, or book, is likely to have different neighbors to the left, right, above and below. Some design methodologies also allow books to be flipped or mirrored when placed, so that opposite phase shapes are reversed. The combinations of such books are virtually limitless.
Because of potential for design rule violations when placing books next to each other, most standard cell libraries have fairly conservative rules about the positioning of phase shapes inside cell boundaries and sharing of phase shapes between adjacent cells. Interaction of phase shapes between neighboring cells may cause phase coloring conflicts. Additionally, when there are phase shape interactions between cells in an RLM, there are concerns about data volume and run time for altPSM generation in a mask design due to unrolling of phase shapes, resulting in the flattening of the hierarchy of the arrays built up from individual cells. In practice, in virtually all cases the assignment of phase shapes end up at the top level of the hierarchy.
One solution to this problem is to prohibit interaction between phase shapes in neighboring cells by enforcing a design rule that ensures that all phase shapes are placed inside cell boundaries by a distance of at least one-half the minimum phase-to-phase spacing rule of the system, i.e., the distance between opposite phase shapes at which no deleterious interaction of opposite phase light occurs in the lithographic process being used. While this approach may work for some standard cell libraries, for others some interaction between phase shapes may be inevitable.
Further complications for altPSM mask design arise in the hierarchical construction of a full chip. Static random access memory (SRAM) circuit portions are often optimized by hand, including the insertions or alteration of phase shapes. There is no current method to handle the phase coloring at the boundaries of such components automatically.
There is a great need in this art for a method of automatically assigning and changing, if necessary, phase colors as chip circuit designs are being assembled to make the altPSM mask.